ASIC/FPGA Functional Verification App Engineer
The Judge Group Inc.

Atlanta, Georgia

Posted in IT


Job Info


Location: REMOTE
Salary: 200-250k
Description: Our client is currently seeking a ASIC/FPGA Functional Verification Application Engineer
Candidate must be a U.S. citizen and have an active DoD security clearance, but a previous clearance that has expired might be considered.

This job will have the following responsibilities:

  • Support the use of integrated circuit (IC) functional verification Electronic Design Automation (EDA) software technologies in the design and verification of complex ASIC & FPGA designs for the most advanced military and aerospace companies.
  • As a Functional Verification Application Engineer, you will be part of a team comprising of an account management team and will contribute to increase the deployment and adoption of Mentor Functional Verification software products within North America customers, and develop new customers.
  • You will be enabling some of our most important customers to be successful with their ASIC/FPGA designs.
  • This position requires a strong confidence in Functional Verification and UVM methods using advanced verification software products.
  • Your focus will primarily be the domestic aerospace and defense market including DoD and DoE organizations.
Qualifications & Requirements:
  • BSEE or BSCS, or equivalent; MSEE preferred
  • 7+ years of experience in a design engineering role focusing on functional verification and/or emulation
  • 7+ years of ASIC/FPGA verification experience using SystemVerilog / UVM
  • Must have experience in:
    • SystemVerilog Assertions (SVA)
    • Coverage-driven verification methodology from planning through closure
    • Developing verification plans
    • Object oriented programming languages and concepts
    • Designing and implementing SystemVerilog / UVM test benches for constrained-random verification
    • Developing functional coverage models
    • Writing and debugging directed and random test cases
    • Migrating designs into hardware emulation
    • Enabling testbenches for hardware acceleration
  • Experience with automation/scripting (Perl, sed, awk, tcl/tk, sh) - C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired
  • Expert in coding with Verilog/VHDL/System Verilog, UVM, PSL/SVA is mandatory
  • Good presentation and communication skills is essential
Contact: mstanley@judge.com

This job and many more are available through The Judge Group. Find us on the web at www.judge.com



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