FPGA Design Engineer Intern
Intuitive

Job Info

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Company Description

At Intuitive, we are united behind our mission: we believe that minimally invasive care is life-enhancing care. Through ingenuity and intelligent technology, we expand the potential of physicians to heal without constraints.

As a pioneer and market leader in robotic-assisted surgery, we strive to foster an inclusive and diverse team, committed to making a difference. For more than 25 years, we have worked with hospitals and care teams around the world to help solve some of healthcare's hardest challenges and advance what is possible.

Intuitive has been built by the efforts of great people from diverse backgrounds. We believe great ideas can come from anywhere. We strive to foster an inclusive culture built around diversity of thought and mutual respect. We lead with inclusion and empower our team members to do their best work as their most authentic selves.

Passionate people who want to make a difference drive our culture. Our team members are grounded in integrity, have a strong capacity to learn, the energy to get things done, and bring diverse, real world experiences to help us think in new ways. We actively invest in our team members to support their long-term growth so they can continue to advance our mission and achieve their highest potential.

Join a team committed to taking big leaps forward for a global community of healthcare professionals and their patients. Together, let's advance the world of minimally invasive care.

Job Description

Primary Function of Position:

The FPGA Design Engineer Intern will work as a part of the engineering team responsible for the design, development, and support of the FPGA designs in the da Vinciä Surgical System. The intern will report to the Manager of Firmware Engineering and will be involved in designing and/or enhancing Verilog-based RTL designs targeted to FPGA devices in the system.

Roles & Responsibilities:

The intern will work in one or more of the following areas in pursuit of solutions to real-world problems facing the Firmware Engineering team:

• Developing and/or enhancing FPGA modules
• Enhancing and expanding our Python-based suite of tools for hardware bring-up, debug, and manufacturing test
• Work with design and verification team to develop testbenches and tests for simulation of new and existing FPGA modules
• Developing improved build and automated test flows for FPGA designs

Qualifications

University Hiring Program Eligibility Requirements:

• University Enrollment: Must be currently enrolled in and returning to an accredited degree-seeking academic program in the Fall.
• Internship Work Period: Must be available to work full-time (approximately 40 hours per week) during a 10-12 week period starting May or June. Specific start dates are shared during the recruiting process.

Skills, Experience, Education, & Training:

• Current enrollment in an Electrical & Computer Engineering or related degree-seeking program at the Bachelor's or Master's level
• Enthusiasm and a passion for technology
• Strong communication skills
• Experience with hardware/firmware design
• Proficient with the following:
  • Verilog/SystemVerilog
  • Python
  • FPGA design tools (e.g., Xilinx Vivado/Vitis, QuestaSim)
  • Basic engineering lab equipment (oscilloscope, DMM, etc.)
• Strong ability to isolate and debug hardware and firmware problems

Additional Information

Due to the nature of our business and the role, please note that Intuitive and/or your customer(s) may require that you show current proof of vaccination against certain diseases including COVID-19. Details can vary by role.

Intuitive is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees, and prohibit discrimination and harassment of any type, without regard to race, sex, pregnancy, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.

We will consider for employment qualified applicants with arrest and conviction records in accordance with fair chance laws.

Shift : Day

Travel : None

Travel Requirements:None Shift:Day

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